Selector-Only Memory (SOM) is a novel memory architecture that addresses the structural limitations of 3D XPoint, which relies on a one-selector–one-resistor (1S-1R) configuration. While 3D XPoint integrates a memory element and a selector in each cell, SOM eliminates the need for a separate memory device by utilizing a single threshold switching element to perform both data storage and cell selection.
By modulating the threshold voltage of the switching element, SOM enables multi-level data storage within a single layer, reducing cell complexity and fabrication steps while greatly improving array scalability.
This innovative structure supports ultra-dense memory integration and simplifies peripheral circuitry, making SOM highly attractive for future non-volatile memory systems.
Our research focuses on understanding the underlying switching mechanisms, stabilizing threshold voltage characteristics, and optimizing device operation for reliable, high-performance SOM arrays.
Resistive Random Access Memory (ReRAM) is a non-volatile memory technology that stores information by changing the resistance state of an insulating layer in response to voltage pulses. ReRAM offers fast switching speed, low power consumption, and excellent scalability, making it a promising candidate for next-generation memory and neuromorphic computing systems. The resistance switching behavior typically originates from either the formation and rupture of conductive filaments or interface-related trap modulation.
Our lab investigates various switching mechanisms, endurance characteristics, and multilevel cell operation in ReRAM, with a particular emphasis on improving reliability, retention, and scalability for practical device applications.
The Ovonic Threshold Switch (OTS) is a volatile switching device that plays a critical role in suppressing sneak-path currents in high-density crossbar memory arrays. It operates by remaining in a high-resistance state until a certain threshold voltage is exceeded, after which it rapidly transitions to a conductive state. Once the voltage drops below the holding level, it returns to the off state, enabling precise selection of memory cells without retaining any data itself. OTS devices are particularly suited for integration in selector-based architectures due to their fast switching speed, steep turn-on slope, and compatibility with back-end-of-line processes.
Our research explores the threshold-switching physics, device stability under repeated cycling, and design optimization for scalable integration with emerging memory systems.